It is economically desirable for many applications that analog circuitry be combined in a monolithic integrated circuit with digital logic circuitry. One such application is the A/D converter of the oversampling type.
An A/D converter of the oversampling type is one in which the analog input voltage is sampled at a rate that is substantially higher than the desired output sampling rate of the converter. Converters of this type are well known in the art and typically have an analog front-end and a digital filter which processes the output of the analog front-end. A suitable analog front-end for this purpose is the delta-sigma modulator, which is also referred to in the literature as a sigma-delta modulator.
For the digital output of a high-resolution A/D converter to be accurate, it is necessary that electrical noise interference with the analog front-end be minimized. A 16-bit A/D converter ideally provides 65,536 different digital outputs, each of which accurately corresponds to a different analog input voltage. For an analog input voltage range of typically plus or minus three volts, or six volts total, the incremental difference in analog voltages is on the order of 100 microvolts.
It is well known that digital logic circuitry can generate considerable electrical noise as a result of logic gates being caused to transition from one logic state to the other. Such noise creates particular difficulties in combining a significant number of high-speed logic gates and a noise-sensitive analog front-end on the same monolithic integrated circuit chip.
In accordance with the foregoing, a need exists for a method for reducing deleterious effects of electrical noise on the analog-to-digital conversion process in the circumstance where it is desirable to include both analog and digital circuitry in the common semiconductor substrate of an integrated circuit.